Synapse, Systolic CNN Accelerator’s Mapper-Simulator Environment
Published in IIT Madras Bachelor Research Thesis presentation forum by Sundar Raman P, 2021
Systolic arrays are one of the most popular compute substrates within DL accelerators today, as they provide extremely high efficiency for running dense matrix multiplications by re-using operands through local data shifts. One such effort by RISE lab at IIT Madras is ShaktiMAAN, an open-source DNN accelerator for inference on edge devices based on systolic arrays. The complexity of this accelerator poses a variety of challenges in:
- Hardware verification
- Bottleneck analysis using performance modelling
- Design space trade-offs
- Efficient mapping strategy
- Compiler optimizations
To tackle the above, I built Synapse (SYstolic CNN Accelerator’s MaPper-Simulator Environment): a versatile python based mapper-simulator environment.
Key Contributions:
- Mapper that generates instruction trace given any workload, knob values for a targeted architecture.
- Functional simulator cost model for ShaktiMAAN.
- An RL agent that interacts with the mapper-simulator environment to search through the design space to find optimal hardware (array, buffer size), software (network folds, loop order) co-design knobs.